КР565РУ8Б
565РУ8, КР565РУ8А, КР565РУ8Б, КР565РУ8В, КР565РУ8Г
Description
Dynamic operational storage device (DRAM) chips with a capacity of 256 kbps (256k x 1); 128 kbps for KR565RU81D ... KR565RU84D. Case type 238.16-1, mass not more than 1-2 g.
КР565РУ8 graphical representation
Pin assignment
1 - address input A8
2 - information input DI
3 - input signal “write-read" WR / RD
4 - input fetch address string RAS
5 - address input A0
6 - address input A2
7 - address input A1
8 - supply voltage
9 - address input A7
10 - address input A5
11 - address input A4
12 - address input A3
13 - address input A6
14 - information output D0
15 - CAS column address selection input
16 - common
Parameters
| Parameter | КР565РУ8А | КР565РУ8Б | КР565РУ8В | КР565РУ8Г | |
|---|---|---|---|---|---|
IC package | Package | 238.16-1, 2104.18-1, 201.9-1 | |||
IC manufacture technology | Technology | MOS | |||
IC series | Series | 565 | |||
Logic gate family | Logic | P-MOS | |||
Query time | TQ | <100 ns | <120 ns | <150 ns | <200 ns |
Memory organization | Structure | 256k x 1 | |||