565РУ5Г

565РУ5, К565РУ5Б, К565РУ5В, К565РУ5Г, К565РУ5Д, 565РУ5В, 565РУ5Г

Description

Chips are a dynamic RAM storage device with a capacity of 64 kbps (64kx1), with control circuits.

  • for KN565RUB (D1, D2), KR565RU5 (D1, D2) 32 kbps (32x1);
  • for K565RU5 (DZ ‚D4), KR565RU5 (DZ‚ D4) 16 to (16x1).

Contains 279618 integrated elements. Package type 2103.16-5, H23.16-18 and 2103.16-8, weight not more than 2.5 g.

Graphical representation of К565РУ5, КР565РУ5, КН565РУ5

Pin assignment:

1 - not connected
2 - information input 01
3 - input signal recording WR
4 - input of the RAS row selection signal
5 - address input A0
6 - address input A2
7 - address input A1
8 - supply voltage
9 - address input A7
10 - address input A5
11 - address input A4
12 - address input A3
13 - address input A6
14 - information output D0
15 - input signal column selection CAS
16 - common.

Truth table

Inputs Output State
RAS CAS WR DI DO
1 1 X X Z Chip not selected
1 0 X X Z Chip not selected
0 1 X X Z Regeneration
0 0 0 0/1 Z Writing 0/1
0 0 1 X 0/1 Reading

Parameters

ParameterК565РУ5БК565РУ5ВК565РУ5ГК565РУ5Д565РУ5В565РУ5Г
Power dissipation
P
<250 mW<195 mW<185 mW<160 mW<200 mW<200 mW
IC package
Package
2103.16-5, 2104.18-1, 201.9-1
IC manufacture technology
Technology
MOS
IC series
Series
565
Logic gate family
Logic
P-MOS
Query time
TQ
<120 ns<150 ns<200 ns<250 ns<150 ns<200 ns
Memory organization
Structure
64k x 1